From dc61e35246cfa66df78be782f9514f421db4bb9d Mon Sep 17 00:00:00 2001 From: bsv Date: Wed, 25 Nov 2015 10:38:07 +0300 Subject: fix addr space --- hdl/mips_system.v | 8 ++++---- hdl/wb/wb.vhd | 4 ++-- sw/Makefile | 2 +- sw/test.asm | 10 +++++----- 4 files changed, 12 insertions(+), 12 deletions(-) diff --git a/hdl/mips_system.v b/hdl/mips_system.v index ffc61ff..d9959b3 100644 --- a/hdl/mips_system.v +++ b/hdl/mips_system.v @@ -8,12 +8,12 @@ module mips_system ( output [7:0] led ); - localparam [31:0] instr_addr_high = 32'h00000fff, + localparam [31:0] instr_addr_high = 32'h000001ff, instr_addr_low = 32'h00000000, - data_addr_high = 32'h0000ffff, - data_addr_low = 32'h00001000, + data_addr_high = 32'h000003ff, + data_addr_low = 32'h00000200, - gpio_base_addr = 32'h00010000; + gpio_base_addr = 32'h00000400; wire i_read_en; wire [31:0] i_addr; diff --git a/hdl/wb/wb.vhd b/hdl/wb/wb.vhd index 5f61a90..3666aa6 100644 --- a/hdl/wb/wb.vhd +++ b/hdl/wb/wb.vhd @@ -163,8 +163,8 @@ architecture rtl of intercon is signal adr : std_logic_vector(31 downto 0); begin adr <= (mips_wbm_adr_o); - ram_wbs_ss <= '1' when adr(31 downto 16)="0000000000000000" else '0'; - wbs_ss <= '1' when adr(31 downto 16)="0000000000000001" else '0'; + ram_wbs_ss <= '1' when adr(31 downto 10)="0000000000000000000000" else '0'; + wbs_ss <= '1' when adr(31 downto 10)="0000000000000000000001" else '0'; ram_wbs_adr_i <= adr(31 downto 0); wbs_adr_i <= adr(31 downto 0); diff --git a/sw/Makefile b/sw/Makefile index 3191ebe..0c8b0db 100644 --- a/sw/Makefile +++ b/sw/Makefile @@ -12,7 +12,7 @@ LIBS = all: $(AS_MIPS) -o test.o test.asm - $(LD_MIPS) -Ttext 0x0 -Tdata 0x1000 -eentry -o test.axf test.o + $(LD_MIPS) -Ttext 0x0 -Tdata 0x200 -eentry -o test.axf test.o $(DUMP_MIPS) --disassemble test.axf > test.lst $(COPY_MIPS) -O verilog -R .text test.axf data.vh $(COPY_MIPS) -O verilog -R .data test.axf text.vh diff --git a/sw/test.asm b/sw/test.asm index 338067d..63ce753 100644 --- a/sw/test.asm +++ b/sw/test.asm @@ -7,12 +7,12 @@ .text /* code goes to text section*/ .ent entry entry: - lw $t0, 0x1000 /* t0 = 1*/ - sw $t0, 0x1002 - lw $t1, 0x1001 /* t1 = 1*/ - lw $t1, 0x1000 /* t0 = 1*/ + lw $t0, 0x200 /* t0 = 1*/ + sw $t0, 0x400 + lw $t1, 0x201 /* t1 = 1*/ + lw $t1, 0x200 /* t0 = 1*/ add $t0, $t0, $t1 /* t0 = t0 + t1 = 2*/ - sw $t0, 0x1200 + sw $t0, 0x400 add $t0, $t0, 0xB /* t0 = t0 + 0xB == 0xD*/ sub $t0, $t0, $t1 /* t0 = t0 - $t1 == 0xC*/ or $t0, $t0, 0x10 /* t0 = t0 | 0x10 == 0x1C*/ -- cgit v1.1